ïÔ: D&R SoC News Alert [SoC-NewsAlert@design-reuse.com]
ïÔÐÒÁ×ÌÅÎÏ: 2 ÍÁÑ 2005 Ç. 22:06
ëÏÍÕ: Michael Dolinsky
ôÅÍÁ: D&R SoC News Alert - May 2, 2005
DR SoC News Alert
Design And ReuseDesign And ReuseDesign And Reuse
EETimes Network
May 2, 2005    


Michael,
Welcome to the issue of May 2, 2005 of D&R SoC News Alert, our email update to provide you with the latest news and information in the System-On-Chip Community.

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  • Cholesky matrix factorization core, Factors a real-valued, input matrix A into triangular matrices for special classes of symmetric matrices from AccelChip Inc.
    H.264 Content Adaptive Variable Length Coding from PixSil Technology
    High Performance CPU/DSP Core for Demanding Real-Time Control and Computation Tasks from ARC International
    10-bit, 175 MHz, 3.3 V Current Steering DAC with 6-bit Programmable Gain from ChipIdea Microelectronics
    AccelChip DSP Synthesis tool automating the generation of synthesizable RTL models directly from MATLAB M-files from AccelChip, Inc.
    IEEE 802.16d OFDM(A) Baseband PHY from Wi-LAN Inc.
    CF e Verification Component implementing behavior of CF+ and CompactFlash storage cards from HDL Design House
    LIN 2.0 e Verification IP from YogiTech
    Wanted IPs :
  • 10/100 Ethernet PHY
  • DRM decryptor
  • The 'why' and 'what' of algorithmic synthesis
    SoC processing options
    Layer 2 Switch Implementation with Programmable Logic Devices
    Subtract software costs by adding CPUs
    Platform SoCs now possible
    FPGA Design Needs More Than a Face Lift
    Rambus CEO eager to move beyond the courtroom -- Harold Hughes discusses his company's legal dramas and the development of the Cell processor
    IP Reuse Can Usher in a Renaissance
    IP/SOC PRODUCTS
    PLDA Announces Immediate Availability of the PCI Express EZ IP Module
    LSI Logic Delivers Low Power SATA Core for ASIC and RapidChip(R) Platform ASIC Designs
    Tallika announces immediate availability of DDR I/II Controller Cores
    Kaben Enters Baseband Video DAC IP Market
    SMIC and Dolphin Integration Partner to Offer Microprocessor Core for 0.35-micron EEPROM Process
    DEALS
    Arasan licenses CE-ATA Host Controller IP core to Centrality Communications
    Synopsys DesignWare IP Enables Full-Service SoC Design Foundry for Global UniChip
    BUSINESS
    nSys strengthens its sales channel, appoints The LogicWorks as an exclusive partner in eastern US and Canada
    Monolithic System Technology, Inc. Extends Stock Repurchase Plan
    ST halts open-source FPGA project
    Silicon Logic Engineering is Awarded $2.2 Million
    ST to 're-deploy' 1,000 engineers amid Q1 losses, CapEx cuts
    FINANCIAL RESULTS
    Faraday Reported a Record First Quarter with 35% International Business ASIC Design-Wins Using 0.13um
    SafeNet Reports First Quarter 2005 Financial Results
    CEVA Reports Solid First Quarter 2005 Financial Results
    LSI Logic Reports 7% Sequential Revenue Growth in Q1, Provides Q2 Business Outlook
    Mentor Graphics Updates 2005 Outlook
    Mentor Graphics Announces First Quarter Results
    Actel Announces First Quarter 2005 Financial Results
    EMBEDDED SYSTEMS
    Accelerated Technologys Nucleus PLUS Support for MIPS32 24K Core Family Supports Developers of Digital Consumer Devices
    Cambridge Consultants introduces new tools to accelerate software development for XAP3 32-bit RISC core
    GAO Introduces a Comprehensive Suite of ARM Development Tools
    FOUNDRIES
    Most Chinese IC design at 0.18-micron, survey finds
    Pure-play foundry market to decline in 2005, says iSuppli
    DongbuAnam Extends ShuttleChip Program to Verify 130nm Prototype Chip Designs Using Copper Interconnects
    SMIC reports 2005 first quarter results
    SMIC Joins ARM Connected Community
    TSMC Unveils Nexsys 65nm Process Technology Plans; Company Gears its Industry-Leading Fabs for First Customer Products by End of 2005
    FPGA/CPLD
    Altera Sets the Standard for Productivity in High-Density Design With Latest Quartus II Software
    Actel Slashes Prices for Flash FPGAs in Military Temperature Plastic Packages
    Cypress Introduces Programmable System on Chip(TM) (PSoC(TM)) in Tiny 4 x 4 mm Package
    Xilinx Virtex Series Surpasses Three Billion In Revenue
    EDA
    Mentor Graphics Extends Catapult C Synthesis Product; Enables 20X to 100X Faster Verification with SystemC
    Major New Release of Synfora PICO Express Cuts Time and Cost Of Producing Complex Consumer System-on-Chip Designs
    OTHER
    FSA and IEE Announce Keynotes for IEE/FSA International Semiconductor Executive Forum

    SPONSORED BY: ALPHA TECHNOLOGIES

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